The human brain actively keeps "learning" in balance by holding on to what matters and letting go of what does not. Researchers in Korea have now reproduced this ability in a semiconductor device, using the color of light to strengthen (remember) or weaken (forget) an artificial synapse's memory. Remarkably, the key ingredient is a material "defect" that engineers usually try to eliminate. The study appears in Nature Communications.

A tandem neural network capable of inferring key physical parameters of semiconductor materials from simple transistor measurements has been developed, as reported by researchers from the Institute of Science, Tokyo. While conventional approaches for this type of analysis require hours or even days, the proposed system produces results in under 1 millisecond with near-perfect accuracy.

The global semiconductor market is approaching US$1 trillion in annual sales, driven by growing demand for faster computers, smarter AI systems and more powerful electronic devices. Singapore, which produces one in 10 of the world's chips, has a direct stake in sustaining that trajectory.

In the rapidly advancing world of semiconductor technology, the relentless pursuit of smaller, faster, and more energy-efficient computer chips is critical to powering the next wave of innovation—from artificial intelligence mega-data centers to cutting-edge medical devices and ubiquitous consumer electronics. At the frontier of this evolution lies extreme ultraviolet (EUV) lithography, a sophisticated method capable of etching circuit patterns at the nanometer scale. However, the intrinsic complexities and astronomical costs associated with current EUV lithographic systems have presented formidable barriers to wider adoption and scalability. Now, a groundbreaking proposal from Professor Tsumoru Shintake of the Okinawa Institute of Science and Technology (OIST) offers a transformative vision for this technology, promising to revolutionize semiconductor manufacturing with unprecedented precision, reduced complexity, and drastically lower costs.

EUV lithography operates by harnessing light with an extraordinarily short wavelength—just 13.5 nanometers—which enables the creation of incredibly fine features on silicon wafers. The process begins when this EUV light is generated and meticulously channeled through an illumination system towards a reflective photomask imprinted with the target circuit design. Upon reflection, this patterned light passes through a projector system composed of precisely curved mirrors, which shrink and focus the intricate design onto a silicon wafer. Subsequent processing etches the illuminated pattern into the wafer’s surface, forming the foundational architecture of semiconductor chips. Crucial to pushing the envelope of miniaturization is the numerical aperture (NA) of these systems—a parameter that defines the range of angles over which the system can accept or emit light. Higher NA values correlate directly to finer resolution capabilities, enabling denser packing of transistors and circuit elements.

Despite the theoretical promise of high-NA EUV lithography, practical implementation has been fraught with challenges. The early explorations into high-NA configurations favored simple in-line setups wherein the photomask, projector, and wafer are aligned along a single optical axis. This streamlined arrangement, while intuitively appealing, introduced significant optical aberrations such as distortions and blurring that intensified with increasing NA. These so-called “mask 3D effects” arise due to the complex interplay of light reflections on the three-dimensional topography of the photomask, adversely affecting pattern fidelity and ultimately the electrical performance of the fabricated chips.

Confronting these longstanding obstacles, Professor Shintake embarked on an ambitious reimagining of the illumination and projection components integral to high-NA EUV lithography. His initial foray involved evaluating the feasibility of a minimalist projector design consisting of a single pair of mirrors—one concave and one convex—with the potential to deliver high-resolution imagery while suppressing aberrations. Although this simplistic approach did not yield immediate success, continued exploration led to a sophisticated two-stage projection configuration. Each stage utilizes a concave-convex mirror pair arranged to optimize optical performance. Remarkably, simulations revealed that carefully orchestrated multiple reflections between these mirrors could cancel out deleterious optical defects, preserving the high numerical aperture without compromising image quality.

These insights emerged from extensive computational modeling conducted using OpTaliX, an advanced optical simulation software. Through meticulous parameter optimization, including mirror curvature adjustments and precise spatial positioning, Shintake and his collaborators delineated an optical path that maintains high resolution while mitigating the distortive mask 3D effects. The theoretical framework underscores the power of optical engineering in overcoming fundamental diffraction and interference phenomena—challenges that have hampered high-NA EUV lithography efforts for decades.

Beyond the technical elegance of the design, the proposed system carries profound economic implications. Current state-of-the-art EUV lithography machines reportedly cost hundreds of millions of euros each, placing them out of reach for all but the largest semiconductor manufacturers. In stark contrast, Shintake’s approach promises to slash these costs dramatically—potentially to just a quarter of today’s expenditures—thus democratizing access to cutting-edge lithography and accelerating development cycles across the industry.

The ramifications extend well beyond chip manufacturing economics. The International Energy Agency forecasts that by 2030, global data center electricity consumption will double, driven largely by the proliferation of energy-intensive artificial intelligence applications. Higher-density chips fabricated with the new high-NA technology would feature electronic pathways shortened by virtue of their finer architectural detail, reducing signal travel distance and thereby minimizing energy loss during computation. Moreover, lower heat emission from these denser chips implies diminished cooling requirements, collectively resulting in meaningful reductions in power consumption and operational costs for data centers worldwide.

As part of his next research phase, Professor Shintake and his team aim to transition from simulation to realization by constructing a physical prototype of the novel high-NA EUV lithography system. This endeavor will necessitate overcoming engineering challenges such as fabricating mirrors with near-perfect reflectivity and minimal surface defects—criteria assumed in simulations but challenging to achieve in practice. Nonetheless, the initial groundwork laid by this study establishes a compelling blueprint for transforming semiconductor fabrication.

In addition to enabling finer patterning capabilities, the simplified in-line projector design enhances overall system robustness and manufacturability. By aligning the photomask, projector, and wafer along a single axis with optimized mirror pairs, the architecture reduces alignment complexities and optical component counts, thereby facilitating easier maintenance and potentially accelerating throughput rates on the manufacturing floor.

Innovations like Shintake’s not only refresh the physics of lithographic imaging but may also catalyze novel computing paradigms by significantly pushing the achievable limits of miniaturization. As industry demand for memory density and logic efficiency mounts exponentially, high-NA EUV lithography could unlock pathways to next-generation chip designs exhibiting superior speed, reduced energy consumption, and lower production costs, collectively powering advancements in artificial intelligence, quantum computing, and ubiquitous digital technologies.

Ultimately, this research signals a pivotal juncture for semiconductor manufacturing, harnessing the power of optical science to surmount entrenched technical and financial hurdles. By reducing the cost and complexity of high-NA EUV lithography, Professor Shintake’s innovation promises transformative impacts on the silicon industry and beyond—enabling faster, greener, and more affordable electronics that will underpin the data-centric future of society.

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Subject of Research: High numerical aperture (high-NA) extreme ultraviolet (EUV) lithography systems for semiconductor chip manufacturing

Article Title: High-NA in-line projector for EUV lithography

News Publication Date: June 12, 2026

Web References: http://dx.doi.org/10.1117/1.JMM.25.2.023801

Image Credits: Andrew Scott, Okinawa Institute of Science and Technology (OIST)

In a groundbreaking advancement for optoelectronic technology, researchers have unveiled a novel approach harnessing the unique properties of Si₃N₄/n-Si hybrid devices to achieve interface-controlled broadband photodetection. This development promises to revolutionize the efficiency and spectral range of photodetectors, devices integral to a wide array of applications from telecommunications to environmental monitoring. The study, recently published in Scientific Reports, highlights how meticulous control over material interfaces can dramatically enhance device performance, marking a significant leap forward in photodetector design and fabrication.

Photodetectors serve as the eyes of modern electronic systems, converting light into electrical signals that enable everything from digital imaging to fiber optic communication. Traditional photodetectors, however, have long been limited by narrow operational bandwidths and sensitivity constraints, curbing their effectiveness in emerging high-performance applications. By integrating silicon nitride (Si₃N₄) with n-type silicon (n-Si), the researchers have engineered a hybrid platform that deftly overcomes these limitations, exploiting interface phenomena to extend detection capabilities across a broad spectrum of electromagnetic radiation.

At the heart of this innovation lies the strategic manipulation of the Si₃N₄/n-Si interface. Silicon nitride, known for its excellent dielectric properties and chemical stability, acts as both a passivation layer and an optical modulator when interfaced with silicon. This interplay at the atomic and electronic scale shapes charge carrier dynamics, reduces surface recombination losses, and enhances photon absorption efficiency. Such interface engineering ensures that the hybrid device is not only highly sensitive but also capable of operating seamlessly over a wide range of wavelengths, from ultraviolet through visible to near-infrared.

The research team deployed advanced fabrication techniques to precisely control the deposition and interface formation of Si₃N₄ on the n-Si substrate. Utilizing plasma-enhanced chemical vapor deposition (PECVD), they achieved a uniform and defect-minimized nitride layer that adheres perfectly to the silicon surface. This meticulous fabrication step is essential as interface traps, commonly induced by imperfections, can severely degrade photodetector responsiveness and noise levels. By minimizing such imperfections, the hybrid device attains an unprecedented signal-to-noise ratio crucial for sensitive detection tasks.

Optical characterization of the Si₃N₄/n-Si hybrids revealed remarkable broadband responsivity, a parameter quantifying the device’s ability to convert incoming photons across various wavelengths into electric current. The devices demonstrated enhanced photoresponse not only in the visible spectrum but also extended into ultraviolet and infrared regions, surpassing conventional silicon-based photodetectors limited by the bandgap constraints of pure silicon. This broadband sensitivity opens the door to new applications where multispectral light detection is necessary without the need for separate sensors.

One of the pivotal mechanisms for this extended response is the formation of interfacial states that facilitate charge transfer and broaden the spectral detection range. These states effectively lower the energy barriers that typically restrict silicon’s photoresponse, enabling efficient utilization of photons with energies both above and below the traditional silicon bandgap. This effect is modulated by the thickness and stoichiometric composition of the Si₃N₄ layer, parameters finely tuned during device fabrication to optimize performance.

Beyond spectral coverage, the temporal response of these hybrid photodetectors is equally impressive. The devices exhibited fast switching times and low dark currents, essential characteristics for high-speed communications and low-light detection scenarios. Reduced dark current, a measure of unwanted noise in the absence of illumination, directly correlates with enhanced sensitivity, thereby allowing the detection of weak optical signals with unprecedented clarity.

Integration compatibility is another striking advantage of the Si₃N₄/n-Si system. Both materials are well-established in mainstream semiconductor manufacturing, meaning that this innovation can be seamlessly incorporated into existing silicon-based electronic platforms. This compatibility facilitates scaling production while maintaining cost efficiency, a critical factor for commercial adoption in industries such as consumer electronics, healthcare diagnostics, and environmental sensing.

The research also delves into the underlying physics governing the device operation. Through combined experimental and theoretical analyses, the study elucidates charge carrier transport across the interface, the role of interface dipoles, and modulation of the built-in electric field that directs photogenerated carriers. Such detailed understanding offers a roadmap for further improvements, potentially inspiring future hybrid systems with tailored optoelectronic properties suitable for specific industrial applications.

In terms of real-world application, these hybrid photodetectors could significantly enhance the performance of cameras, optical coherence tomography devices, and remote sensing instruments. The broadband detection capability reduces the reliance on multiple sensors, simplifying device architectures and improving reliability. Additionally, their fast response times and stability under various environmental conditions are promising for deployment in harsh or variable environments, including space exploration and autonomous vehicle navigation.

This research marks a notable shift in photodetector technology by emphasizing interface engineering to transcend inherent material limitations. By capitalizing on the complementary properties of Si₃N₄ and n-Si junctions, the study injects fresh momentum into the pursuit of universal photodetectors that excel in speed, sensitivity, and spectral range. The findings underscore the vast potential lying in hybrid material systems, motivating continued exploration into interface-controlled photonic devices.

Looking forward, the researchers suggest exploring further modifications to the Si₃N₄ layer such as doping or introducing nanoscale structuring to tailor the interface behavior. Such advancements may unlock new functionalities like polarization sensitivity or even tunable wavelength selectivity, pushing hybrid photodetectors beyond current performance frontiers. These directions align with the broader scientific quest to develop smarter, more adaptable optoelectronic components for the next generation of information and sensing technologies.

In conclusion, the Si₃N₄/n-Si hybrid photodetector described in this study represents a pivotal development that combines material science innovation with practical engineering to address longstanding challenges in photodetection. Its broadband capability, operational stability, and integration potential poise it as a top candidate for a wide spectrum of applications demanding fast, efficient, and reliable light detection. As industries continue to demand more from photonic devices, such interface-controlled systems stand out as a transformative solution poised to redefine the future of photodetection technology.

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Subject of Research: Interface-controlled broadband photodetection in Si₃N₄/n-Si hybrid devices

Article Title: Interface-controlled broadband photodetection in Si₃N₄/n-Si hybrid devices

Article References:
Manfo, T.A., Yıldız, D.E., Bağcı, C. et al. Interface-controlled broadband photodetection in Si₃N₄/n-Si hybrid devices. Sci Rep (2026). https://doi.org/10.1038/s41598-026-57951-y

Image Credits: AI Generated

AI data centers are power-hungry. Not only do artificial intelligence computations consume enormous amounts of electricity, but a significant amount of energy is also required to cool the semiconductor chips that heat up during operation. As AI chips continue to deliver higher performance, the amount of heat they generate increases rapidly. As a result, conventional air cooling and external copper heat spreaders are approaching their practical limits. To address this challenge, a KAIST research team has developed an ultra-high-efficiency liquid-cooling technology that cools semiconductor chips from within.

A tiny new chip could give cameras and sensing systems a far sharper view of the world, helping them detect subtle differences in materials and environments that standard color imaging systems cannot see.

The world's power grid is straining under the surge in electricity demand from data centers, electric vehicles and renewable energy. And a century-old technology, the power transformer, must support this dramatic increase. A particularly weak link in this is the potential for insulation breakdown, the most frequent indicator of power transformer failures.

Seoul National University College of Engineering announced that a research team led by Prof. Yongtaek Hong from the Department of Electrical and Computer Engineering has developed a high-performance transparent organic light-emitting diode (OLED) incorporating highly conductive transparent metal mesh top electrodes fabricated using a selective metal deposition technique. The research was published in the journal Materials Horizons and was selected as the outside front cover image for the issue.

A joint research team has experimentally observed ballistic transport in single-crystalline copper thin films, demonstrating that ballistic transport is achievable in an industry-standard metal at interconnect-relevant dimensions. The study, titled "Ballistic transport in nanodevices based on single-crystalline Cu thin films," was published in Nature Communications.

If you shop on Google Flights, you get a quick comparison of different itineraries: One flight's carbon emissions may be average, while another's are 14% higher. But if you go shopping for a new laptop, you likely won't find quick, comprehensible information on different models' sustainability bona fides, despite the notable environmental impacts of producing and discarding electronics. In part, that's because understanding a device's emissions is difficult and time-consuming, even for experts.

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Researchers may have unlocked the future of computing by turning flat silicon chips into densely stacked 3D architectures. For decades, the semiconductor industry has boosted computing power by making transistors smaller and fitting more of them onto a single chip. That strategy has fueled remarkable advances in electronics, but it is now approaching fundamental physical [...]