SK keyfoundry said Sept. 9 it signed a long-term agreement to provide 130-nanometer foundry services to automotive semiconductor company Elmos Semiconductor.

SK keyfoundry recently held a signing ceremony in Frankfurt am Main, Germany, and will provide foundry capacity to Elmos through 2037. Elmos has used SK keyfoundry’s 350-nanometer process technology for the past 18 years.

“Elmos is an outstanding company in the automotive semiconductor market,” an SK keyfoundry official said. “Securing a long-term supply agreement is meaningful not only in terms of revenue but also for our technological growth.”

Wafer supply prices may be adjusted under the agreement. The 200-millimeter wafers supplied by SK keyfoundry are experiencing a global shortage as major chipmakers including TSMC and Samsung Electronics reduce 200-millimeter capacity and shift toward 300-millimeter production.

SK keyfoundry and Elmos will jointly develop the E550.01 Smart 4-Channel eFuse Controller. The chip controls the supply of power inside a vehicle across four separate paths and cuts power to protect electrical systems when abnormalities such as overcurrent occur. Mass production is targeted for 2027.

SK keyfoundry will also provide Elmos with deep trench isolation (DTI) capability. The company said the technology enables highly integrated, high-voltage designs with low substrate current.

“SK keyfoundry has been a trusted partner for many years,” Elmos Chief Executive Officer Arne Schneider said. “It will support our continued growth.”

“We will accelerate our automotive semiconductor supply, starting with Elmos,” SK keyfoundry CEO Lee Dong-jae said.

DB HiTek is in the final stages of preparing for mass production of its 8-inch silicon carbide (SiC) wafer foundry business.

DB HiTek said Sept. 9 that it had completed reliability verification of a 1,200-volt SiC MOSFET. The company plans to provide customers with its third-generation process design kit (PDK) in November as it moves to launch its foundry business.

The third-generation PDK targets specific on-resistance of 2.3 mΩ·cm² at an 18-volt gate voltage, down from 2.5 mΩ·cm² for the second generation. It is also designed to allow the device to withstand a sudden short circuit for 2.5 microseconds without damage. DB HiTek said the third-generation PDK could shorten semiconductor design time by more than a year.

“We have secured the core technology and mass-production foundation for what will be the world’s first 8-inch SiC foundry service,” DB HiTek said. “We will prepare for mass production as planned and move to establish an early lead in the market.”

Mass production is targeted for the first half of next year. Rival SK keyfoundry is also expected to begin mass production of 8-inch SiC foundry products in the first half of next year. SiC foundry operations require production lines to be developed and established jointly with customers, meaning both companies have effectively secured customers ahead of mass production. Samsung Electronics also has an 8-inch SiC production line, but does not offer it to external foundry customers.

The SiC semiconductor market currently centers on 150-millimeter wafers, while mass production using 200-millimeter wafers remains rare globally. SiC semiconductors use specially processed wafers that differ from conventional silicon (Si) wafers. Due to the technology’s lower maturity, production yields for 200-millimeter SiC wafers are lower than for 150-millimeter wafers, resulting in lower output.

DB HiTek will operate its SiC foundry at its Sangwoo Campus in Eumseong, North Chungcheong Province, converting the current development line into a mass-production line. Initial capacity will be relatively small at 800 wafers a month, about 1.3% of the Sangwoo facility’s total monthly capacity of 63,000 wafers. The company has established an integrated process covering design, manufacturing, characterization, reliability verification and epiwafer supply.

For now, DB HiTek is operating the development line primarily for customers it has already secured. It plans to add customers after establishing the mass-production system and gradually expand capacity in line with market demand.

Meta and Panmnesia have proposed a next-generation artificial intelligence (AI) data center architecture designed to make an entire data center operate like a single chip. The approach could address latency problems that emerge as AI models grow larger.

Panmnesia said Sept. 8 that it and Meta introduced technology in a Nature Reviews journal that connects central processing units (CPUs), accelerators and memory through Compute Express Link (CXL) and scales the architecture across a data center. Researchers from Meta and Panmnesia co-authored the paper.

The approach uses CXL to reduce variations in latency between racks, allowing a data center to operate predictably like a single chip. CXL is a high-speed interface that connects different devices including CPUs, graphics processing units (GPUs) and memory.

Racks, the building blocks of AI infrastructure, exchange data rapidly within each rack using high-speed link technologies. Standard interfaces such as Ethernet and InfiniBand are used to connect one rack to another.

The problem is that as AI models expand to trillions of parameters, latency with conventional interfaces increases sharply. AI companies have increased the number of CPUs and GPUs to train on massive datasets, inevitably resulting in higher latency.

Meta and Panmnesia addressed latency variation by connecting racks through CXL. They added three types of hardware: high-fanout switches, fabric controllers and link acceleration units. They also proposed optical CXL to reduce the physical distance over which signals must travel.

The number of accelerators that a single CPU can manage increased from two to 16, while up to 960 connected domains can be managed. Latency was reduced by as much as 90%. Panmnesia said the CXL-based technology demonstrated that models larger than today's AI models can be trained without interruption.

"CXL presents a direction for next-generation AI infrastructure in which a data center operates as a single computing system," Panmnesia CEO Jung Myoungsoo said.

Arm is preparing for the spread of agentic artificial intelligence (AI) across mobile devices, data centers and robotics.

Arm unveiled “CSS for Mobile 2,” its latest compute subsystem (CSS) for mobile devices, on Sept. 7. CSS for Mobile 2 combines the Mali G2 Ultra NX graphics processing unit (GPU) with the C2 CPU Cluster.

The platform is optimized for edge environments as agentic AI evolves. Arm expects agentic AI workloads to increasingly shift from data centers to edge devices such as desktops, laptops and mobile devices, driven by high token costs, long latency and security concerns. The company expects on-device computing, which operates physically closer to users, to become increasingly important in addressing these issues.

The Mali G2 Ultra NX features a dedicated neural accelerator. It supports neural super sampling, which renders graphics at a lower resolution and then uses AI to reconstruct them at a higher resolution, extending technology previously used on desktops to mobile environments. Arm placed the neural accelerator close to the GPU to enable neural graphics at about 1 watt of power on mobile devices. Frame rates can increase by as much as fourfold at the same power level.

The C2 CPU Cluster enhances Scalable Matrix Extension 2 (SME2) capabilities for AI computing. While the previous C1 supported one SME2 unit, the C2 can be configured with up to two. SME2 performance in the C2 reaches 5 to 7 trillion operations per second (TOPS). General CPU performance has also improved, with single-thread performance up 15% and multi-thread performance up 12% from the previous generation. Processing time for agentic AI workloads is reduced by as much as 24%.

Arm also introduced “Neoverse CSS N4” for data centers. The platform is designed to accelerate development of custom systems-on-chip (SoCs) for general-purpose computing, networking and storage. It supports enhanced security, higher memory bandwidth, chiplet interfaces, LPDDR6 and PCIe Gen7. Arm increased design flexibility so customers can configure core counts, cache capacity and input/output (I/O) according to their requirements. Performance per socket is more than double that of the previous generation, while performance per watt improves 25% and memory bandwidth increases 75%.

Arm also provided an update on its first silicon chip, the “AGI CPU,” announced in March. The company said OpenAI, Meta, Cloudflare, Oracle, SAP and Lenovo are developing AGI CPU-based solutions following its launch.

Related products are expected to be released in the coming months. Customers that design their own SoCs can receive the technology as intellectual property (IP), while those seeking to rapidly expand computing infrastructure can choose finished products.

Arm is also strengthening its push into the physical AI market, including autonomous driving, robots and drones. The company estimates the physical AI computing market is currently worth $25 billion and expects it to grow to more than $200 billion after 2030.

Arm also announced the launch of Total Design for Physical AI, with more than 80 key companies including AWS, Hugging Face, NXP, Siemens and Unitree participating. The initiative links the entire development cycle — including silicon, cloud, sensing, security and system validation — with the physical AI ecosystem to support product development. Arm is also developing a common framework for robotics platforms, aiming to rigorously standardize robot capabilities by level, similar to the Level 1-to-5 system used for autonomous driving.

Synopsys is expanding its semiconductor design platform following its acquisition of Ansys, targeting further growth in South Korea’s semiconductor market.

Shankar Krishnamoorthy, chief product development officer (CPDO) at Synopsys, told a press conference at the Grand InterContinental Seoul Parnas in Gangnam on Sept. 8 that the company will “accelerate technological innovation in South Korea through agentic artificial intelligence (AI), multiphysics-based design and a silicon-to-systems integrated engineering approach.”

The importance of the South Korean market is growing. According to Synopsys’ own research, semiconductors are expected to account for 42.3% of the country’s total exports this year, while high-bandwidth memory (HBM) exports are projected to increase 153%.

Most of Synopsys’ revenue in South Korea comes from the memory sector, with Samsung Electronics and SK hynix among its major customers. The two companies use Synopsys’ semiconductor design tools and other technologies to develop memory chips.

Synopsys is also expanding its revenue base into system semiconductors. “Beyond memory, we work with Samsung Electronics’ foundry and System LSI businesses,” Krishnamoorthy said. “We also collaborate with Rebellions and FuriosaAI across all areas, including electronic design automation (EDA) tools.”

Synopsys’ strength lies in the breadth of its design environment. The company acquired engineering simulation software company Ansys in July last year, expanding beyond its existing EDA and intellectual property (IP) portfolio to add system design and simulation capabilities. This allows chips to be designed with consideration for the systems in which they will operate, including rockets, aircraft and data centers.

The company is also addressing the growing complexity of AI chip design. As AI chips incorporate more dies and HBM, interconnect density increases, requiring designers to consider signal integrity, power, thermal effects and stress simultaneously. Synopsys combines EDA and multiphysics technologies to support advanced designs including three-dimensional integrated circuits (3D ICs) and co-packaged optics (CPO).

Synopsys is also applying agentic AI to EDA. The technology assists engineers and autonomously performs lengthy tasks. In an agentic AI design verification process with Nvidia, the time required to obtain register-transfer level (RTL) results was reduced by a factor of 50, while verification coverage increased 20%. Productivity in analog and mixed-signal design improved by as much as threefold.

Synopsys also supports its own application programming interface (API). The company said it requires fewer tokens and lower token costs than competing solutions while significantly reducing latency.

SEMIFIVE has secured its first mass-production project using a 4-nanometer process. The company did not disclose the size of the supply deal, but said it exceeds 10% of last year's revenue of about 121 billion won.

SEMIFIVE said Sept. 8 that it will begin mass production of a 4nm chip for South Korean fabless semiconductor company HyperAccel. Production has been delayed by two quarters from the original schedule. In 2024, SEMIFIVE said it would design HyperAccel's "Bertha" using Samsung Electronics' 4nm process, with mass production initially targeted for the first quarter of 2026.

The company did not disclose the contract value due to a non-disclosure agreement (NDA) with the customer. The deal exceeded 10% of last year's revenue, making it subject to regulatory disclosure. The contract runs through June 15, 2028. Revenue will be recognized in stages as products are supplied, with a 10% upfront payment, 60% interim payment and 30% final payment.

Bertha is specialized for artificial intelligence (AI) inference workloads, including large language models (LLMs). The chip has a die area of more than 500 square millimeters. Naver Cloud is reportedly a potential customer.

As a design house, SEMIFIVE designed Bertha for optimization with Samsung Electronics' semiconductor foundry process. It handled front-end design, verification, packaging, testing and mass production on a turnkey basis. Under the contract, SEMIFIVE generates revenue each time the jointly designed chip is produced.

SEMIFIVE's mass-production orders totaled about 42.3 billion won in the first half of this year, roughly double the 21.2 billion won recorded last year.

"We will continue the growth in mass-production revenue demonstrated in the first half into the second half," SEMIFIVE CEO Cho Myung-hyun said. The company expects revenue to exceed 200 billion won this year. Company-wide revenue totaled about 94.7 billion won in the first half.