The information exchanged by modern devices is typically protected by cryptographic techniques, approaches that convert readable data into scrambled, unreadable code that can only be deciphered by authorized parties or devices. To descramble encrypted data, devices or accounts need access to randomly generated cryptographic keys, unique, randomly generated sequences of binary code, letters or numbers that are essential for encrypting or decrypting data.
Inspired by the human brain, Oregon State University researchers have developed a new light-sensitive device that combines sensing and memory while controlling how digital memories strengthen or fade over time. The research was published in Advanced Functional Materials.
In a groundbreaking advancement that bridges the gap between biological intelligence and artificial systems, researchers at Oregon State University have engineered a light-sensitive device that not only detects visual stimuli but also bio-mimics the brain’s ability to store and modulate memories dynamically. Drawing direct inspiration from the complex workings of human neural processes, this pioneering approach integrates sensing, memory, and signal processing into a single phototransistor, a feat poised to revolutionize the future of neuromorphic computing.
Traditional artificial intelligence hardware architectures typically bifurcate these essential functions—detection, memory retention, and processing—forcing data to shuttle between distinct components. This separation not only introduces latency but significantly amplifies energy consumption. The novel phototransistor developed by the OSU team disrupts this paradigm by embedding memory capabilities precisely where sensory inputs occur, vastly improving computational efficiency and speed.
Central to this device’s innovation is its ability to mimic the neurochemical processes governing memory strength and decay in the human brain. Rather than storing information with fixed permanence, the phototransistor utilizes trapped electrical charges generated by incident light to represent memories, which can then be pharmacologically tuned—via electrical gate voltages—to either reinforce or weaken these stored traces over time. This dynamic modulation reproduces the adaptive nature of biological synapses and opens unprecedented avenues for creating AI systems that can ‘forget’ as well as ‘remember,’ essential for real-time learning and adaptation.
Structurally, the device marries an oxide semiconductor acting as the electronic transistor channel with an organic photosensitive layer responsible for absorbing photons and generating charge carriers. The organic layer traps a subset of these carriers, creating a persistent local electric field even after illumination ceases. This trapped charge influences electron flow through the semiconductor channel, effectively encoding a memory of prior light exposure.
A key technical breakthrough lies in the device’s gate-tunable interface: by adjusting the voltage applied to the transistor’s gate terminal, researchers can manipulate the spatial positioning of trapped charges relative to the conduction channel at a nanoscopic level. This precise control modulates the strength of electrical interaction, allowing for programmable decay times of the optoelectronic memory—ranging from seconds to considerably longer durations. Such flexibility is vital for neuromorphic systems requiring adjustable time constants for processing temporal patterns.
The implications of this technology extend beyond simple visual sensing. By localizing both sensing and adaptive memory functions, the phototransistor can serve as a foundational building block for advanced vision systems capable of real-time data processing with exceptional energy efficiency. This novel hardware approach offers substantial improvements over conventional sensors, which often offload processing to centralized units, incurring latency and energy penalties.
Neuromorphic computing, a field striving to emulate the architecture and operational principles of the brain, stands to gain significantly from this development. The device’s capacity to embody synapse-like plasticity within a phototransistor embodies a leap toward systems that do not merely compute but adapt, learn, and optimize autonomously. Furthermore, the integration of these functionalities at the hardware level paves the way for compact, scalable AI platforms potentially transformative for robotics, autonomous vehicles, and sensory-rich IoT devices.
The research team acknowledges that the trapped charges’ mobility within the device’s photosensitive layer marks a fundamental departure from fixed-charge memory devices. By enabling charge repositioning in response to externally applied voltages, the phototransistor achieves an unprecedented degree of control over memory retention timescales—a property rarely realized in optoelectronic components designed for AI applications.
From an energy perspective, co-localizing sensing and computation reduces data transfer bottlenecks traditionally plaguing AI processors. This attribute directly addresses pressing challenges in AI hardware, where escalating computational demands often collide with limitations in battery life and thermal management. As a result, the novel phototransistor aligns with broader efforts to develop sustainable, high-performance AI technologies.
Conceived through a multidisciplinary collaboration spanning electrical engineering and physical sciences at Oregon State University, the device’s development also underscores the growing convergence of materials science with computational intelligence. By synergizing metal oxide semiconductors with organic tetracene compounds, the team harnessed complementary material properties—robust electron transport with efficient light absorption—to realize the device’s multifunctional capabilities.
The National Science Foundation’s support, alongside the efforts of researchers including Larry Cheng, Ahasan Ullah, Tasnim Sarker, Xueqiao Zhang, Andrew Ensinger, Lizhong Chen, Roshell Lamug, and Oksana Ostroverkhova, culminated in the publication of their findings in the esteemed journal Advanced Functional Materials. The study not only charts new territory in optoelectronics but also sets the stage for transformative innovation in neuromorphic computing hardware.
As artificial intelligence increasingly demands systems capable of real-world adaptability and resource efficiency, innovations like this gate-tunable neuro-phototransistor epitomize the direction forward. By drawing directly from the brain’s principles of memory modulation and energy-efficient computation, the OSU team’s technology heralds a new era where AI devices can perceive, process, and remember in ways that approximate human cognition more closely than ever before.
Subject of Research: Not applicable
Article Title: Neuromodulator-Inspired Gate-Tunable Tetracene–Metal Oxide Phototransistor for Adaptive Optoelectronic Memory and Neuromorphic Computing
Qualcomm CEO Cristiano Amon said Tuesday that the company is working on over 40 different AI wearable devices — including jewelry, earbuds with cameras, pins, and watches — a sign of how aggressively the chipmaker is betting that the next major computing platform won't be a phone.
In a groundbreaking development that could revolutionize the field of artificial intelligence and neuromorphic computing, researchers have unveiled a novel algorithm–hardware co-design approach featuring neuromorphic networks supported by dual memory pathways. This innovative framework, recently published in Nature Machine Intelligence, promises to overcome longstanding challenges in efficiently mimicking brain-like processing in silicon hardware. The fusion of algorithmic design and hardware architecture epitomizes a synergistic leap forward for neuromorphic systems, which strive to emulate the efficiency and adaptability of biological neural networks.
Neuromorphic computing, inspired by the structure and function of the human brain, seeks to replicate neural dynamics through specialized hardware that inherently supports parallel and event-driven processing. Unlike traditional von Neumann architectures, which segregate memory and processing units, neuromorphic systems integrate these functions, drastically reducing latency and energy consumption. However, a persistent limitation in current neuromorphic implementations lies in their constrained memory capacity and difficulties in sustaining stable learning over time. The new co-design method directly confronts these issues by introducing a dual memory pathway mechanism akin to the human brain’s approach to memory storage and retrieval.
The dual memory pathways conceptualized by the research team separate short-term and long-term memory processing within the neuromorphic network. Short-term memory pathways facilitate rapid, flexible adaptation to incoming data, echoing the brain’s working memory functions. Concurrently, long-term memory pathways enable the consolidation and retention of learned information over extended periods. This bifurcation fosters an architectural efficiency that mitigates memory interference and catastrophic forgetting—two notorious hurdles in neuromorphic learning systems and artificial intelligence at large.
Fundamentally, the innovative algorithm tailors synaptic plasticity dynamics to the hardware substrate, leading to more stable, biologically plausible learning rules. The researchers employ spike-timing-dependent plasticity (STDP) paradigms adjusted dynamically by the dual pathways, allowing the system to adapt continuously yet retain core learned information without overwriting. This hybrid plasticity approach is supported by circuits that facilitate separate yet interactive memory stores, closely emulating the hippocampus-neocortex complementarity observed in mammalian brains.
Critically, the design is optimized to leverage emerging non-volatile memory technologies such as resistive RAM (ReRAM), which afford dense, low-power synaptic implementation. The team’s hardware prototype integrates these resistive elements into the dual memory architecture, striking a delicate balance between speed, retention, and energy efficiency. By co-optimizing the algorithmic parameters with hardware constraints, the design attains a level of performance and scalability previously unattainable in neuromorphic networks.
Extensive benchmarking on machine learning tasks highlights the superiority of this co-design approach. Tasks demanding continual learning and domain adaptation—traditionally challenging due to interference effects—exhibit enhanced stability and precision. Notably, the dual pathways enable the neuromorphic system to segregate novel information from prior knowledge efficiently, supporting lifelong learning scenarios critical for real-world AI applications such as robotics, autonomous systems, and adaptive sensory processing.
The implications of this breakthrough extend beyond traditional AI. By more faithfully replicating the brain’s memory consolidation processes, these neuromorphic networks could yield insights into neurological disorders characterized by memory dysfunction. Additionally, the modularity of the dual memory pathways invites future customization and specialization for domain-specific tasks, envisioning a new class of adaptive hardware that evolves alongside its operational environment.
Moreover, the research addresses the formidable challenge of hardware variability and noise—a persistent bottleneck in neuromorphic device deployment. The co-designed algorithm inherently compensates for device-level imperfections through adaptive learning thresholds and redundancy in memory representations. This robustness not only ensures reliable operation over extended periods but also enhances manufacturability and cost-effectiveness for large-scale silicium implementations.
This co-design paradigm exemplifies a pivotal shift in neuromorphic engineering, moving away from generic algorithm deployment on fixed hardware towards integrated development of systems where both hardware and software are mutually optimized. This approach reflects an emerging philosophy in AI hardware: embracing the interdependence of physical substrate and algorithmic function to unlock previously constrained capabilities.
Such a sophisticated neuromorphic platform provokes exciting questions regarding the future landscape of artificial intelligence. Could dual memory pathways represent a standard architectural motif underpinning all next-generation AI chips? Might this design accelerate the creation of truly autonomous systems capable of continuous, context-aware learning within dynamic environments? The potential scale and impact of these mechanisms suggest transformative ripples across industry sectors reliant on AI, from healthcare and finance to autonomous vehicles and beyond.
While promising, challenges remain. Scaling the dual memory network to extremely large, brain-scale systems presents engineering complexities necessitating further innovations in materials, circuit design, and integration techniques. Additionally, fine-tuning the balance between memory consolidation and plasticity, ensuring both adaptability and stability, demands deeper theoretical understanding informed by neuroscience. Continued collaboration between multidisciplinary teams of neuroscientists, material scientists, electrical engineers, and computer scientists will be pivotal to this endeavor.
Looking ahead, this work may catalyze the proliferation of neuromorphic devices poised to operate at unprecedented energy efficiencies while offering continuous learning capability. By taking inspiration from the brain’s memory architecture and rigorously co-designing compatible hardware, the research ushers in an era where artificial intelligence systems can remember, adapt, and grow with a natural fluidity previously attainable only in biological organisms.
The dual memory pathway design stands as a milestone demonstrating that bridging the algorithm–hardware gap is an indispensable strategy for advancing neuromorphic computing. Its capacity to resolve persistent issues such as catastrophic forgetting and memory interference attests to an elegant merging of biological principles with cutting-edge technology. As AI advances toward greater autonomy and contextual sophistication, innovations like these could form the foundational building blocks of truly intelligent machines.
In sum, the synergy achieved by this algorithm–hardware co-design exemplifies the future of neuromorphic architectures — dynamic, adaptive, and deeply integrated with the physical medium of computation. It heralds a pivotal moment where the dream of brain-inspired computing inches closer to reality, promising devices that do not merely process information, but learn and remember in a resilient and energy-efficient manner akin to the human mind.
Subject of Research: Algorithm–hardware co-design in neuromorphic networks incorporating dual memory pathways to enhance learning stability and efficiency.
Article Title: Algorithm–hardware co-design of neuromorphic networks with dual memory pathways.
Article References:
Sun, P., Su, Z., Achterberg, J. et al. Algorithm–hardware co-design of neuromorphic networks with dual memory pathways. Nat Mach Intell (2026). https://doi.org/10.1038/s42256-026-01255-3
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