Stellantis has integrated Factorial Energy’s solid-state battery cells into a Dodge Charger Daytona development vehicle and begun road testing the technology, marking a key step toward bringing solid-state batteries into production vehicles.

The milestone is the first time Factorial’s FEST (Factorial Electrolyte System Technology) solid-state cells have been installed in a Stellantis vehicle. The companies will now evaluate battery performance, reliability, and safety under real-world driving and charging conditions.

The development follows laboratory validation completed in 2025, when Stellantis and Factorial demonstrated automotive-scale FEST cells with an energy density of 375 Wh/kg. The cells also achieved charging from 15 percent to 90 percent in 18 minutes and operated across temperatures ranging from -22 °F to 113 °F.

Moving from laboratory testing to an on-road vehicle required engineers to redesign parts of the battery system. Stellantis said it developed a patented mechanical architecture that allows the solid-state cells to fit within an existing battery pack while maximizing performance.

From lab to road

Engineers also modified battery controls and pack design to meet automotive requirements for durability and safety. According to the companies, these changes were needed to ensure consistent performance under a range of driving and charging conditions.

The battery pack is based on Stellantis’ STLA Large platform and serves as the first vehicle in a previously announced multi-stage development program.

“Battery development is a balancing act. It’s not enough to optimize a single metric. We need a system that delivers real benefits in a real vehicle,” said Ned Curic, Stellantis Chief Engineering and Technology Officer.

“This milestone shows we are bringing solid-state batteries closer to our customers with the potential for longer range, faster charging, and lower costs. Just as important, FEST’s strong compatibility with lithium-ion manufacturing processes gives us a critical path to scale this technology.”

Solid-state batteries replace the liquid electrolyte used in conventional lithium-ion batteries with a solid material. The technology is expected to improve energy density, increase safety, and reduce charging times. However, scaling production and integrating the cells into vehicles have remained major challenges for automakers and battery developers.

Scaling battery technology

With the battery now installed in a working vehicle, Stellantis and Factorial have launched a testing and calibration program to gather performance data from real-world operation.

The companies said the program will evaluate charging behavior, vehicle safety, and long-term reliability. The results will also help refine battery management systems and pack-level controls before any future commercial deployment.

“We are deeply honored to work alongside Stellantis, one of the world’s great mass-market automakers, on this STLA Large-based development car,” said Siyu Huang, CEO of Factorial.

“What we have built together, from cell chemistry to pack architecture to enable real-world road testing, is exactly the kind of deep, full-stack collaboration that solid-state has always required.”

Factorial, which is backed by Stellantis, Mercedes-Benz, Hyundai and Kia, is among several companies racing to commercialize solid-state batteries. The latest milestone moves its technology beyond cell-level testing and into vehicle validation, a critical stage before potential mass-market adoption.

A Chinese startup has claimed a breakthrough in photonic chip manufacturing by producing 8-inch optical chip wafers without relying on conventional deep ultraviolet (DUV) lithography systems.

Hangzhou-based Prinano said it successfully validated mass production of photonic chips using its nanoimprint lithography (NIL) technology, a manufacturing approach that physically stamps nanoscale patterns onto wafers instead of projecting them through optical systems.

According to the company, the process was carried out in collaboration with Shenzhen Litra Technology and used its PL-AS vacuum air-cushion nanoimprint lithography equipment. Prinano said the method “completely avoids” the need for DUV lithography tools while reducing manufacturing costs to about one-tenth of traditional solutions.

The announcement comes as Chinese chipmakers continue looking for alternative manufacturing technologies amid restrictions on access to advanced lithography systems from Dutch supplier ASML.

Seeking lithography alternatives

Photonic chips are used in applications such as optical communications, sensing systems, lidar, and data centers. Unlike conventional electronic chips, they process information using light rather than electrical signals.

Prinano said its technology supports wafer-level production of photonic chips and can be applied to optical communication and sensing devices based on gallium arsenide, indium phosphide, and silicon photonics.

The company said its PL-AS tool offers sub-10-nanometer line-width resolution along with wafer-level pressure control. However, it did not disclose production volumes, manufacturing yields, or customer shipment data.

Nanoimprint lithography has long been viewed as a potential alternative to traditional optical lithography because it can create extremely fine features without the need for expensive projection optics. The technology was pioneered in the 1990s by Princeton University professor Stephen Y. Chou.

Prinano founder Ge Haixiong studied under Chou and established the company in 2017 to develop NIL equipment, materials, and manufacturing processes.

Questions over scalability

Interest in nanoimprint lithography has increased in recent years as chipmakers seek lower-cost manufacturing methods. In 2023, Canon introduced a commercial NIL system and promoted it as an alternative to some advanced lithography tools.

Despite the promise, analysts have questioned whether the technology can match the throughput and yields required for large-scale semiconductor manufacturing.

Research firm SemiAnalysis has previously noted that while NIL equipment can be cheaper than advanced lithography tools, overall economics depend on factors such as defect rates, template production, throughput, and process integration.

Prinano’s announcement focuses specifically on photonic chips rather than advanced logic processors, a distinction that may make commercialization more achievable. Photonic devices often rely on repeating nanoscale structures such as gratings, waveguides, and ring resonators, which can be well suited to imprint-based manufacturing.

The company said the technology has moved into wafer-level production validation, but independent verification of yields, commercial deployment, and manufacturing scale has not yet been disclosed.

For China’s semiconductor industry, the development highlights ongoing efforts to explore alternative manufacturing routes as access to advanced lithography equipment remains restricted.

Google has unveiled DiffusionGemma, a new experimental AI model that generates text using diffusion rather than the autoregressive approach used by most large language models today. The company says the model can deliver up to four times faster text generation on dedicated GPUs while running on consumer hardware.

The model builds on Google’s Gemma 4 family and Gemini Diffusion research. Unlike traditional language models that generate text one token at a time from left to right, DiffusionGemma creates and refines blocks of text in parallel.

According to Google, the approach enables output speeds exceeding 1,000 tokens per second on an NVIDIA H100 GPU and more than 700 tokens per second on an NVIDIA GeForce RTX 5090.

The company says DiffusionGemma is aimed at developers working on speed-sensitive applications such as interactive editing, rapid content iteration, code infilling, and other workflows where low latency is more important than maximum output quality.

Breaking text bottlenecks

Most large language models generate text sequentially, predicting one token after another. While effective, this process can leave local hardware underutilized when serving a single user.

DiffusionGemma takes a different approach. Instead of generating text word by word, it creates a 256-token block at once and then repeatedly refines it through multiple passes.

Google compares the difference to moving from a typewriter to a printing press. Rather than waiting for each token to be generated before producing the next one, the model processes an entire section of text simultaneously.

The company says this shifts the bottleneck from memory bandwidth to compute performance, allowing modern GPUs to operate more efficiently during local inference.

Another key feature is bi-directional attention. Since the model generates text in parallel, every token can attend to every other token during generation. This makes it better suited for tasks where future context matters, such as code completion, in-line editing, mathematical structures, and biological sequences.

Google highlighted a demonstration in which DiffusionGemma was fine-tuned to solve Sudoku puzzles, a task that can be challenging for conventional autoregressive models because later tokens influence earlier decisions.

Designed for local AI

The model uses a 26-billion-parameter mixture-of-experts architecture but activates only 3.8 billion parameters during inference. According to Google, this allows the model to fit within roughly 18 GB of VRAM when quantized, making it accessible on high-end consumer GPUs.

DiffusionGemma also includes an iterative self-correction mechanism. Because it evaluates an entire text block during refinement, it can identify and fix mistakes as generation progresses.

However, Google acknowledged that the model prioritizes speed over quality. The company said standard Gemma 4 models remain the preferred choice for production environments where output quality is the primary concern.

The speed advantage is also most apparent in local deployments and low-concurrency environments. In cloud settings serving large numbers of users simultaneously, conventional autoregressive models can often utilize hardware efficiently through batching, reducing the benefits of diffusion-based generation.

Google has released DiffusionGemma under an Apache 2.0 license through Hugging Face and is supporting deployment through tools including MLX, vLLM, Hugging Face Transformers, NVIDIA NeMo, and Unsloth.

Georgia Tech researchers have recreated the effects of solar wind on lunar minerals in a laboratory experiment, providing new evidence that the constant stream of charged particles from the sun plays a major role in shaping the moon’s surface.

The team exposed ilmenite, a mineral commonly found on both Earth and the moon, to a synthetic version of solar wind. The experiment produced nanophase iron, tiny metallic particles that are widely observed in lunar soil and are considered a key signature of space weathering.

Scientists have long known that the moon’s surface is altered by both micrometeorite impacts and solar wind. However, the relative contribution of each process has remained unclear. The new results suggest solar wind alone can create some of the same microscopic features seen in actual lunar samples.

The findings could help researchers better interpret remote sensing data used to estimate the age and composition of the moon’s surface. They may also improve understanding of how lunar soil evolves over time without requiring direct sample collection from every location.

Simulating lunar aging

The research was carried out by physics Ph.D. candidate Roshan Trivedi and recent Ph.D. graduate Advik Vira through the Georgia Tech Center for Lunar Environment and Volatile Exploration Research (CLEVER), a NASA-backed research initiative focused on lunar science and Artemis mission objectives.

Using a vacuum chamber designed to simulate solar wind conditions, the researchers exposed ilmenite samples to charged particles and then examined the material using high-resolution electron microscopy.

The experiment recreated the effects of thousands of years of solar wind exposure in a controlled environment.

The team observed the formation of nanophase iron and lunar-like rims on the mineral surface, features commonly associated with space weathering on the moon.

“Scientists have been doing laboratory radiation experiments for years, but they haven’t been able to characterize the results at this level of detail,” said lead author Trivedi.

The ability to reproduce these features in the laboratory could help scientists better understand how different regions of the moon have changed over time and improve interpretations of orbital observations.

Clues about lunar water

The study may also offer insights into one of lunar science’s most important questions: how water forms on the moon.

Researchers found that the solar wind experiments created tiny voids within the mineral structure. These microscopic spaces could potentially provide locations where hydrogen delivered by solar wind interacts with oxygen present in lunar minerals.

“Water would be a fantastic resource for humans operating on the moon, but scientifically, we are driven simply by the question of how water gets there in the first place,” said Phillip First, a professor in the School of Physics.

“Solar wind is potentially one way, because protons in solar wind provide the hydrogen of H2O molecules while oxygen is present in lunar minerals.”

The researchers say the ability to simulate a wide range of exposure ages could help future studies investigate the connection between solar wind, lunar minerals, and water formation.

“Having the ability to recreate the solar wind and having results look so similar to actual lunar samples is excellent,” said co-lead author Vira.

The findings were published in The Planetary Science Journal.

Researchers in South Korea have developed a new electrolyte additive that significantly improves the lifespan and capacity of aqueous batteries, a technology widely viewed as a safer and lower-cost alternative to lithium-ion batteries.

The team, led by Professor Hoseok Park from Sungkyunkwan University (SKKU), found that adding a small amount of a specially designed zwitterionic material to the electrolyte helped overcome key problems that have long limited the commercialization of aqueous battery systems.

Unlike lithium-ion batteries, aqueous batteries use water-based electrolytes, making them less flammable, more environmentally friendly, and potentially cheaper to manufacture. However, their performance has been hindered by unstable zinc deposition and unwanted reactions between zinc electrodes and water during charging and discharging.

These issues can lead to corrosion, uneven metal buildup, and rapid capacity loss, reducing battery life and limiting large-scale deployment.

Tiny additive, big impact

To tackle the problem, the researchers developed a zwitterionic additive known as C10. Zwitterions contain both positive and negative charges within the same molecule, allowing them to interact with surrounding ions in unique ways.

When added to the electrolyte, C10 molecules spontaneously assembled into nanostructures measuring about 3.77 nanometers in diameter. These structures served two functions simultaneously.

First, they guided zinc ions to deposit more evenly across the electrode surface, reducing the formation of irregular zinc structures that can damage batteries. Second, they formed a thin protective layer over the zinc metal, shielding it from direct contact with water and limiting corrosion-causing side reactions.

The combined effect produced substantial performance gains.

Aqueous batteries using the modified electrolyte maintained stable operation for more than 2,800 hours. The cells also achieved an areal capacity of 8.10 mAh cm⁻², which the researchers describe as world-leading performance among aqueous battery systems reported to date.

“We have demonstrated that the performance of aqueous batteries can be substantially enhanced through a simple approach of adding a small amount of material to the electrolyte, without the need for expensive materials or complex fabrication processes.”

Storage systems targeted

Improving both cycle life and storage capacity has been a longstanding challenge for aqueous battery developers. Many previous approaches improved one metric at the expense of the other.

The new electrolyte strategy appears to address both issues simultaneously while avoiding costly manufacturing changes.

The researchers believe the technology could be useful for large-scale energy storage applications, where safety, cost, and durability are critical factors.

“Beyond renewable energy storage, this technology holds potential for application in large-scale energy storage systems (ESS) for AI infrastructure and data centers, which are experiencing explosive growth.”

Demand for energy storage is expected to rise alongside the expansion of renewable power generation and the rapid growth of AI computing infrastructure, both of which require reliable methods to store and distribute electricity.

Because the new approach relies on a simple electrolyte modification rather than redesigning the battery architecture, it may offer a practical path toward improving the commercial viability of aqueous battery systems.

The findings were published in the journal Nano-Micro Letters.

IQM Quantum Computers has developed a new quantum error-correcting code that it says can reduce logical error rates by up to 1,000 times compared with the widely used surface code while requiring up to eight times fewer physical qubits.

The company said the new approach, called barbell codes, could help address one of the biggest challenges facing quantum computing: correcting errors quickly enough to enable large-scale, fault-tolerant machines.

Quantum computers are highly sensitive to noise, which can introduce errors during calculations. To overcome this, researchers use quantum error correction, a process that spreads information across multiple physical qubits to create more reliable logical qubits. However, existing methods often require large numbers of qubits and increasingly complex hardware.

According to IQM, its new code aims to improve both efficiency and practicality by lowering error rates while reducing the number of physical qubits needed to protect quantum information.

Fewer qubits, fewer errors

The barbell code family was designed specifically for IQM’s Constellation processor architecture, which features enhanced connectivity between qubits. In the system, each qubit can directly interact with up to 12 neighboring qubits, compared with four in a conventional square-grid arrangement.

The company said the design allows high-performance error correction without requiring extensive additional hardware. Barbell codes rely on a single long coupler connection for every second qubit, reducing the need for multiple long-range crossing couplers that can complicate chip fabrication.

By taking advantage of the processor’s connectivity, the code can generate the entanglement needed for error correction while keeping hardware requirements comparatively low.

“We are pioneering the next chapter in quantum computing,” said Jan Goetz, CEO and Co-founder of IQM Quantum Computers.

“Our approach offers a highly competitive path to scalable quantum error correction with superconducting qubits, paving the way for large-scale, fault-tolerant quantum computers.”

The company said the approach is intended for real-world superconducting quantum processors rather than idealized laboratory systems, with an emphasis on manufacturability and scalability.

Building practical quantum

Error correction is widely considered one of the key hurdles preventing today’s quantum computers from tackling commercially valuable problems at scale. While advances in qubit quality have steadily improved hardware performance, experts believe fault-tolerant systems will require robust error-correction schemes capable of suppressing errors faster than they accumulate.

IQM claims its barbell codes offer a path toward that goal by combining lower logical error rates with lower hardware complexity. The company said the technology supports its roadmap toward quantum systems capable of operating with hundreds of high-precision logical qubits.

The development comes as IQM prepares to deploy 150-qubit quantum systems to customers later this year. The company has also announced IQM Halocene, a quantum computer designed for testing and developing error-correction technologies.

If the reported performance gains can be replicated in large-scale systems, the new approach could help reduce the hardware overhead traditionally associated with fault-tolerant quantum computing.

The development details and numerical performance analysis were published on arXiv.

H55 has delivered certification-grade propulsion battery modules to Pratt & Whitney Canada for RTX’s hybrid-electric flight demonstrator program, marking a key step in the integration and flight-testing phase of the project.

The delivery places H55’s battery systems directly into an active aerospace testing environment, where they will support hybrid-electric propulsion trials aimed at improving aircraft efficiency and reducing fuel consumption. The move signals growing maturity in H55’s technology, shifting it further into certified aviation applications rather than prototype development.

Hybrid-electric aviation is now moving beyond concept-stage research into regulated testing and certification pathways. Aircraft manufacturers and engine makers are increasingly relying on suppliers that can meet strict aviation safety standards while also scaling production for real-world deployment.

H55’s modules are designed specifically for this environment. The company focuses on certification-grade energy storage systems that can be integrated into aircraft propulsion architectures and repeatedly deployed across different platforms once approved by regulators.

From lab to flightline

The latest delivery reflects a transition from development work to industrial deployment. According to the companies, the battery modules are now part of a flight demonstrator program led by Pratt & Whitney Canada under RTX.

“H55’s ability to deliver aviation-grade battery systems within a rigorous certification and production framework plays a crucial role in demonstrating hybrid-electric technology in flight.”

The system is intended to support ongoing integration and flight-testing activities, where hybrid-electric propulsion is evaluated under real operating conditions. This includes verifying performance, safety, and reliability in environments that simulate commercial aviation use cases.

H55 says its battery architecture was built for certification requirements from the ground up. The company has also accumulated more than 2,000 flight hours across multiple electric aircraft programs without battery-related incidents, forming a safety record that supports its current aerospace partnerships.

Certification push underway

The delivery also highlights the increasing importance of certification readiness in electric aviation. Unlike early-stage prototypes, systems used in flight demonstrators must already meet regulatory expectations for safety design, testing, and operational reliability.

“This achievement provides a strong foundation for what comes next across hybrid-electric aviation, defence, UAVs and next-generation aerospace platforms.”

The company added that its technology is designed to scale from certified design to repeatable manufacturing, a key requirement for aircraft manufacturers preparing for future commercial deployment of hybrid-electric systems.

The RTX demonstrator program is part of broader efforts across the aviation industry to validate hybrid-electric propulsion technologies that could reduce fuel use and emissions. Battery systems remain one of the most critical components in this transition due to their impact on weight, safety, and performance.

H55’s role in the program places it among a small group of companies supplying certification-focused energy storage systems for aerospace testing programs. The company has also completed regulator-required propulsion battery certification testing, which it says strengthens its position in the emerging electric aviation supply chain.

As hybrid-electric aviation moves closer to commercial adoption, suppliers capable of meeting both regulatory and performance demands are expected to play a central role in shaping next-generation aircraft platforms.

Researchers at the National University of Singapore have developed a quantum random number generator chip that can verify the integrity of its own hardware while producing random numbers, addressing a long-standing security challenge in digital encryption systems.

Random numbers are critical for encryption keys, secure transactions, digital signatures, and other cybersecurity applications. Existing random number generators, including quantum versions, rely on users trusting that their hardware components continue to operate as intended. If a component degrades or is tampered with, the output could become predictable without being detected.

The new chip is designed to eliminate that risk by continuously checking whether its measurement hardware is behaving as expected during operation.

The research team, led by Associate Professor Charles Lim from the National University of Singapore’s Department of Electrical and Computer Engineering, says the approach could strengthen security in sectors ranging from finance and healthcare to artificial intelligence and connected devices.

Hardware trust removed

Most quantum random number generators operate using what researchers call a trusted-device model. Under this approach, components such as lasers, modulators, and detectors are assumed to match their specifications throughout their lifetime.

The new chip instead uses a measurement-device-independent protocol. This means users only need to trust the quantum light signals entering the system rather than the detector responsible for measuring them.

During operation, the chip generates known quantum light states and compares detector responses against predictions from quantum theory. If the results match expectations, the system converts the data into certified random numbers. If not, the process stops automatically.

“The measurement unit in quantum random number generators has traditionally been very difficult to characterize, making its real-world reliability hard to guarantee. Our solution removes the need to trust that this unit is operating as specified during use,” said Associate Professor Charles Lim.

The device integrates both the signal encoder and optical detector on a single silicon chip manufactured using an eight-inch wafer process commonly used in semiconductor production. Unlike some quantum technologies, it operates at room temperature and does not require cryogenic cooling.

Researchers also addressed a challenge involving silicon-based light modulators. Adjusting the phase of light can unintentionally change its brightness, potentially affecting security. The team developed a control method that compensates for this effect and maintains stable optical signals.

Security over speed

The chip’s detector achieved a total efficiency of 69.1 percent, exceeding the protocol’s minimum requirement of 67 percent. Tests also showed that the system generated more certified random bits than it consumed as an input seed, confirming that it produces fresh randomness.

Researchers describe the device as the most secure quantum random number generator chip demonstrated so far. Its security analysis assumes a worst-case scenario in which an attacker may possess quantum correlations with the detector itself.

That level of security comes with a trade-off. The current experimental system produces 64 bits per second, significantly slower than conventional quantum random number generators that can exceed 100 gigabits per second.

The team believes performance can improve substantially through better detector technology. Laboratory photodiodes developed by the researchers have already reached 92.4 percent efficiency, and simulations suggest future versions of the chip could achieve data rates of 68 megabits per second.

“This chip paves the way towards integrating practical self-testing quantum random number generators into compact, secure systems,” added Assoc Prof Lim.

The study was published in the journal PRX Quantum.

Semiconductor maker Texas Instruments has introduced a new battery monitoring chip designed to give electric vehicles and energy storage systems earlier warning of battery failures while reducing the number of components required inside battery packs.

The company announced the BQ79826Z-Q1 on Tuesday, calling it the industry’s highest-cell-count battery monitor with an integrated electrochemical impedance spectroscopy (EIS) engine. The device is designed to provide real-time insight into battery health and detect conditions that could lead to failures such as thermal runaway.

The new monitor supports up to 26 battery cells per device, allowing engineers to track more cells with fewer monitoring chips. According to TI, the device can monitor up to 44 percent more channels than previous-generation solutions, helping reduce system complexity, board space requirements, and overall battery pack costs.

The launch comes as automakers and energy storage developers look for ways to improve battery safety, extend battery life, and lower system costs while scaling production of EVs and large-scale storage systems.

Early fault detection

A key feature of the BQ79826Z-Q1 is its integrated EIS engine. The technology measures a battery’s electrochemical behavior in real time, giving engineers a view into changes occurring inside individual cells.

“Just as an electrocardiogram (EKG) monitors the heart, EIS monitors a battery,” the Dallas-based company said in a release.

The company says the technology can identify fault conditions earlier than conventional monitoring approaches by detecting changes from within battery cells. This could help battery management systems flag safety risks before they develop into more serious issues.

“The electrification of transportation and the rapid expansion of energy storage are redefining what battery performance must deliver, and as a leader in battery management technology, TI is uniquely positioned to meet that challenge,” said Wenjia Liu, vice president and general manager of battery management systems at TI.

Liu added that the technology helps “shine a light” inside battery cells and provides chemical-state data that software can use to make real-time decisions on battery safety and performance.

Fewer chips required

Beyond safety, TI says the higher cell count could simplify battery pack architecture. By supporting 26 cells per device, the monitor can reduce the number of monitoring components needed across a battery pack.

The company claims the chip supports eight more cells than competing solutions, enabling designers to lower bill-of-material costs while maintaining reliability.

The monitor can also be paired with TI’s BQ79881-Q1 pack monitor and communications bridge, allowing developers to use the same architecture across different battery chemistries, module sizes and mechanical designs.

TI says the device delivers voltage accuracy of less than 2 mV across temperatures ranging from -40°F to 257°F. The company also claims its EIS measurements are five times faster than previous solutions, helping improve state-of-charge calculations and battery health monitoring.

The BQ79826Z-Q1 complies with Automotive Safety Integrity Level D requirements and ISO 26262 functional safety standards. TI is showcasing the technology at the Power Conversion, Intelligent Motion Expo and Conference (PCIM) 2026 in Nuremberg, Germany.

UK has unveiled a £1.1 billion ($1.47 billion) plan to build domestic artificial intelligence computing capacity, including a national AI supercomputer and major funding for homegrown chip development, as countries race to secure control over advanced computing infrastructure.

The strategy was announced as part of a wider push to strengthen the country’s sovereign computing capability, with investments spanning supercomputing, semiconductor design, skills development, and venture funding for AI hardware startups. The government said the plan is aimed at improving national security, boosting innovation, and supporting economic growth.

A key component of the plan is a £750 million ($1 billion) national AI supercomputer scheduled for deployment in 2030. It will use a mixed chip architecture combining existing processors with next-generation hardware designed to handle complex AI workloads more efficiently.

The government is also allocating £400 million ($534 million) from this budget toward next-generation chips, including £150 million ($200 million) for inference chips to be purchased this summer from UK-based firms. Additional funds will support later-stage chip procurement as technologies mature.

The initiative also includes a £120 million ($160 million) AI hardware innovation program to help British companies design and test new chip technologies, alongside £45 million ($60 million) in skills funding to train engineers, chip designers, and researchers.

Chip race heats up

The plan comes as global demand for AI compute continues to rise sharply, driven by large-scale model training and deployment across industries. Governments and companies are now competing to secure access to advanced chips and computing infrastructure, which have become central to AI development.

A fund led by US venture capital firm Playground Global, with backing of up to £150 million ($107 million) from the British Business Bank, will also invest in UK-based AI hardware companies. The British Business Bank said this represents its largest single fund investment to date.

Technology Secretary Liz Kendall said, “AI is the defining currency of economic and hard power in today’s world and the countries that control the hardware behind it will hold the keys to the future.”

She added that the UK aims to strengthen domestic capability by supporting chip design and production, while ensuring the benefits of AI development remain within the country.

Building computer power

The national AI supercomputer will form part of the UK’s broader AI Research Resource, which already includes systems such as Isambard-AI and Zenith. The goal is to provide researchers, startups, and public services with greater access to high-performance computing.

Officials said the system will combine proven and next-generation processors in what is known as a heterogeneous architecture, allowing different chip types to handle different workloads more efficiently.

The government is also expanding its semiconductor skills pipeline, including doctoral training centers and undergraduate bursaries. The number of supported students is expected to rise in the coming years as demand for chip expertise grows.

The plan is part of a wider effort to position the UK as a competitive player in the global AI hardware and computing race, where the US and China currently dominate infrastructure and chip design.

OpenAI has confidentially filed for an initial public offering in the U.S., joining a growing wave of artificial intelligence companies preparing for public market debuts as investor appetite for AI accelerates.

The ChatGPT maker made the filing with the U.S. Securities and Exchange Commission on Monday, though it has not disclosed the size or timing of the offering. The move places OpenAI alongside rivals such as Anthropic and SpaceX-linked AI ventures that are also moving toward listing.

According to reports, OpenAI is targeting a valuation of up to $1 trillion in what could become one of the most closely watched IPOs in recent years. The listing could take place as early as September, depending on market conditions. The company has not confirmed timing.

In a statement, OpenAI said: “We recently submitted a confidential S-1. We expect it to leak so we’re just announcing it. We have not decided on timing yet; it may be a while because there are things we want to do that are likely easier as a private company. But it’s a complicated set of tradeoffs and this gives us the option to go public sooner if that ends up being best.”

AI valuation race

The IPO push comes amid a rapid escalation in valuations across the artificial intelligence sector. OpenAI was valued at about $852 billion in its latest funding round, while competitor Anthropic has reportedly reached a valuation close to $965 billion following its own confidential IPO filing.

The developments suggest that multiple trillion-dollar AI firms could hit public markets within a short time window, marking a rare concentration of high-growth listings in a single sector.

OpenAI has also scaled its commercial footprint sharply. The company says ChatGPT now has more than 900 million weekly active users and over 50 million paid subscribers. It also reported monthly revenue of about $2 billion earlier this year.

Shifting industry landscape

The company’s IPO filing follows a period of internal restructuring and strategic realignment. OpenAI has been working to transition its governance model into a public benefit corporation structure, a change aimed at easing capital access and enabling broader partnerships.

The company has also deepened ties with major technology players including Microsoft, Amazon, and Google, even as competition intensifies across the AI industry.

At the same time, OpenAI faces rising competition from Anthropic, whose Claude AI models have gained traction among developers and enterprise users. The rivalry has intensified as both firms expand into coding tools, enterprise software, and infrastructure-heavy AI systems.

OpenAI CEO Sam Altman described the current phase of the company’s evolution as the beginning of a broader economic shift driven by artificial intelligence.

“The central question now is how to make advanced AI abundant, affordable, safe, useful, and easy enough for every person and organization to benefit from it,” he said in a blog post.

The IPO filing also comes after legal tensions involving Elon Musk, who co-founded OpenAI in 2015. A U.S. jury recently ruled against Musk in a lawsuit challenging OpenAI’s shift away from its original nonprofit structure, removing a legal uncertainty that had weighed on the company’s public market prospects.

China’s largest battery maker CATL has unveiled a new battery pack architecture that allows sodium-ion and lithium-ion batteries to be used inside the same enclosure, a move aimed at accelerating sodium-ion deployment in electric vehicles, battery-swapping networks, and energy storage systems.

The design, called “One Shell, Two Cells,” was disclosed during an industrial research event organized by China’s Ministry of Industry and Information Technology (MIIT) News Centre and reported by Securities Times.

The platform uses a standardized battery enclosure capable of housing either lithium-ion or sodium-ion cells without changing the pack’s physical dimensions. The approach could help manufacturers and infrastructure operators switch between battery chemistries without redesigning vehicles, battery-swapping stations, or thermal management systems.

This modular approach could also simplify large-scale battery deployment, allowing manufacturers to streamline production lines while reducing redesign requirements across different vehicle platforms and energy storage systems.

The announcement comes as China’s battery industry pushes sodium-ion technology as a solution to one of lithium batteries’ biggest weaknesses: poor performance in extremely cold temperatures.

One pack, two chemistries

In regions such as Xinjiang, where winter temperatures can fall below -25°C, lithium iron phosphate batteries can experience slower charging and significant capacity losses. Sodium-ion batteries are viewed as a potential alternative because they maintain stronger performance in cold conditions.

According to CATL, the new architecture allows sodium-ion and lithium-ion systems to be exchanged within the same footprint, simplifying deployment across mobility and energy storage applications.

The design could prove particularly useful for battery-swapping operators. The same station infrastructure could support sodium-ion packs in cold northern regions while continuing to use lithium-based batteries in warmer areas.

The development builds on CATL’s broader sodium-ion strategy. Earlier this year, the company’s Chief Scientist Wu Kai said manufacturing bottlenecks affecting sodium-ion batteries had been resolved and that future versions could deliver driving ranges of up to 600 kilometers.

The company is also preparing commercial deliveries of its first sodium-ion energy storage systems later this year.

Durability targets emerge

Beyond the pack architecture, industry participants used the event to highlight progress in sodium-ion battery durability.

CATL and several suppliers reported reaching a 15,000-cycle benchmark, a level that could support operating lifetimes of up to 20 years in stationary storage and other high-use applications.

Cathode supplier Ronbay Technology said its sodium iron phosphate materials have also surpassed 15,000 charge-discharge cycles while improving electrode density. The company currently operates 6,000 tons of annual production capacity and plans significant expansion over the next two years.

Meanwhile, chemical producer Wanhua Chemical outlined efforts to reduce reliance on imported biomass feedstocks used in hard-carbon anodes. The company is developing synthetic hard-carbon materials derived from resin and coal, aiming to lower costs and strengthen domestic supply chains.

The latest announcements suggest China’s sodium-ion battery sector is moving beyond laboratory-scale development and into large-scale commercial deployment. With standardized pack designs, longer lifetimes, and expanding material production, manufacturers are positioning sodium-ion batteries as a complementary technology to lithium-ion systems rather than a direct replacement.